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[VHDL-FPGA-Verilog] Cordic

Description: cordic算法ip核,国外网站搞到的,可以应用于电机控制，快速数值计算，基于FPGA硬件实现-cordic ip core,just enjoy
Platform: | Size: 241664 | Author: 刘业超 | Hits:

[Software Engineering] ram_top

Description: arm ahb slave bus sram ip in verilog
Platform: | Size: 2048 | Author: msd | Hits:

[VHDL-FPGA-Verilog] DDR2_controller

Description: DDR2控制器IP的设计与FPGA实现，使用verilog语言-DDR2 Controller IP Design and FPGA implementation, use the verilog language
Platform: | Size: 1818624 | Author: alins | Hits:

[VHDL-FPGA-Verilog] FPGA_FFT

Description: 基于IP核的FPGA FFT算法模块的设计与实现 在QUATUSII下实现-IP-based core module FPGA FFT algorithm design and implementation be achieved in QUATUSII
Platform: | Size: 222208 | Author: linxing | Hits:

[VHDL-FPGA-Verilog] Altera_IP_verilog

Description: Altera IP的产生与实现。定制一个8B10B编码器，采用verilog语言建立仿真模型，并验证。-Altera IP generation and implementation. Customize a 8B10B encoder, using verilog language, a simulation model, and verify.
Platform: | Size: 395264 | Author: Gorce | Hits:

[VHDL-FPGA-Verilog] VGA

Description: 应用VEROLOG HDL编写的VGA的IP核，可用于SOPC BUILDER中-the control of the i2c bus
Platform: | Size: 518144 | Author: jack ming | Hits:

[VHDL-FPGA-Verilog] pipelined_fft_64

Description: 利用IP Core编写的Verilog程序，实现FFT变换，希望对大家有帮助。-Written using Verilog IP Core procedures to achieve FFT transformation, we want to help.
Platform: | Size: 99328 | Author: chengyungang | Hits:

[VHDL-FPGA-Verilog] spi

Description: SPI IP CORE Verilog quartus-SPI IP CORE Verilog quartusii
Platform: | Size: 1487872 | Author: thegreeneyes | Hits:

[VHDL-FPGA-Verilog] uart

Description: uart IP CORE Verilog quartus-uart IP CORE Verilog quartusii
Platform: | Size: 36864 | Author: thegreeneyes | Hits:

[VHDL-FPGA-Verilog] wishbone

Description: wishbone IP CORE Verilog quartus-wishbone IP CORE Verilog quartusii
Platform: | Size: 13312 | Author: thegreeneyes | Hits:

[VHDL-FPGA-Verilog] USB2.0-IP-core

Description: 用verilog 写的USB2.0，含源码。从别处找来的，不敢独享，希望对大家有帮助-Written by verilog USB2.0, including source code. Recruited from elsewhere, and not exclusive, we want to help
Platform: | Size: 200704 | Author: 柳同学 | Hits:

[VHDL-FPGA-Verilog] cortex_m1

Description: cortex_m1 verilog IP，synplify环境-cortex_m1 verilog IP, synplify environment
Platform: | Size: 3679232 | Author: dpai | Hits:

[VHDL-FPGA-Verilog] HDLC

Description: verilog HDL语言编写的HDLC协议的IP核，包括通讯控制及CRC。-written in verilog HDL HDLC protocol IP core, including communications control and CRC.
Platform: | Size: 69632 | Author: 王强 | Hits:

[VHDL-FPGA-Verilog] CoreSPI_21_eval

Description: SPI IP核源码，包括Verilog和VHDL两种语言源码-SPI IP core source code, including the two languages ​ ​ Verilog and VHDL source code
Platform: | Size: 628736 | Author: 任林枫 | Hits:

[ARM-PowerPC-ColdFire-MIPS] ARM-Verilog-HDL-IP-CORE

Description: ARM Verilog HDL IP CORE
Platform: | Size: 67584 | Author: hebin | Hits:

[VHDL-FPGA-Verilog] 101259356ethernet

Description: etherent testbeanch by using verilog hdl
Platform: | Size: 1016832 | Author: weike | Hits:

[VHDL-FPGA-Verilog] PWM

Description: verilog描述 PWM IP核 内部包括载波 占空比 和时能寄存器-IP kernel of PWM based on Verilog hdl
Platform: | Size: 4096 | Author: 胡静 | Hits:

[VHDL-FPGA-Verilog] DDR-SDRAM_IP_core

Description: DDR-SDRAM接口模块verilog源代码，可用作IP核使用，已在FPGA上验证-DDR-SDRAM interface module verilog source code, can be used as IP cores to use, proven
Platform: | Size: 474112 | Author: zyy | Hits:

[VHDL-FPGA-Verilog] SDR_SDRAM_IP

Description: SDR SDRAM 控制器，Altera官网重要资料。内涵说明文档，和VHDL与Verilog两种设计IP。-SDR SDRAM controller from Altera
Platform: | Size: 2360320 | Author: peteryu010 | Hits:

[VHDL-FPGA-Verilog] 1_02_FullAdd4

Description: 四位元全加器,為Verilog/VHDL構成的IP模組電路-4bit fulladder
Platform: | Size: 12288 | Author: ytkao | Hits:
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